The Design Challenges

The design complexity of integrated circuit systems is outgrowing the capabilities of traditional register transfer level (RTL) methods, and it is commonly acknowledged that the ultimate solution is to move to the next level of abstraction beyond RTL. Electronic system level (ESL) design automation has been identified as the next productivity boost for the semiconductor industry. However, despite some recent success in ESL simulation, the transition to ESL design will not be as well accepted as the transition to RTL without robust and efficient behavior-level and system-level synthesis technology that automatically compiles functional and/or algorithmic descriptions into optimized hardware architectures.

 

Overview

AutoESL Design Technologies (AutoESL), Inc. is a privately held company providing advanced behavior-level and system-level synthesis technologies and development tools for designing and implementing application-specific integrated circuits (ASICs), Structured ASICs, and field-programmable gate arrays (FPGAs). AutoESL offers the ESL designers an innovative platform-based design and synthesis flow that automatically generate high-quality RTL code from behavior- level and system-level SystemC/C descriptions. The company also provides consulting and training services related to complex chip designs using AutoESL synthesis tools. AutoESL’s solution leads to significant productivity and quality-of- result improvements in designing and producing integrated circuits for a variety of semiconductor markets, including communications, computing, consumer electronics, networking, and many others.  The company sells its products through both direct sales and distribution channels. AutoESL was founded in January 2006 as a Delaware Corporation and is headquartered in Los Angeles, California.

 

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